The present invention relates to a member for making a mask and a method of producing the mask-making member, a mask made from the mask-making member and a method of making the mask made from the mask-making member, an exposure process using the mask, and a method of fabricating a semiconductor device using the mask. In particular, the present invention relates to a technique suitable for exposure of a substrate such as a wafer to charged particle beams, typically, electron beams.
Semiconductor integrated circuit devices, liquid crystal display units, CCD devices, and the like have been fabricated by using a fine processing technique for semiconductors. Along with the increased degree of integration of these semiconductor devices, circuit patterns formed thereon have become finer, and to form such finer circuit patterns, exposure by charged particle beams, particularly, electron beams have become a focus of attention. An electron beam exposure process is effective to form finer circuit patterns; however, it has a disadvantage that a throughput (amount treated per unit time) is low. To improve such a throughput, there have been practically used two kinds of electron beam exposure systems: a variable shaped beam exposure system in which electron beams are deflected between two beam forming masks to be shaped into a desired size of about 5 μm at maximum, and a block full exposure system in which a circuit pattern portion is formed in a lower one of two beam forming masks, wherein a plurality of character patterns are formed by exposure at one beam shot. An electron beam exposure system, composed of a combination of the variable shaped beam exposure system and the block full exposure system, has been already commercially available. In the case of forming the recent highly integrated circuit patterns by exposure, however, this block full exposure system is yet significantly low in throughput than the existing exposure system using light.
To solve the problem associated with throughput of the electron beam exposure system, an electron beam reduction transfer exposure system has been disclosed, for example, in Japanese Patent Laid-open No. Hei 5-160012, wherein a mask having a circuit pattern for the whole of one integrated circuit chip is irradiated with electron beams, so that an image of a portion, within the irradiated range, of the circuit pattern is transferred at a specific reduction ratio, for example, 1/4 through a projection lens. In this electron beam reduction transfer exposure system, however, if the entire mask equivalent to the whole of the integrated circuit chip is full irradiated with electron beams, there may occurs an inconvenience that the circuit pattern cannot accurately transferred by exposure. To cope with such an inconvenience, an electron beam reduction-and-division transfer exposure system has been disclosed, for example, in Japanese Patent Laid-open No. Hei 5-251317, wherein a field of view of an electron-optical system and a circuit pattern on a mask are divided into a plurality of regions, and the divided parts of the pattern are sequentially formed on a wafer by sequential exposure in such a manner as to be stitched into an accurate circuit pattern for the whole of one integrated circuit chip.
The electron beam reduction-and-division transfer exposure system makes it possible to obtain a high resolution and a high throughput; however, it requires a high resolution mask formed at a high accuracy. For a mask of a reduction ratio of 1/4used for the electron beam reduction-and-division transfer exposure system, the reduction ratio is substantially the same as that of a mask used for an exposure system using light. If a mask exposure system for making a mask, which mask is used for the electron beam reduction-and-division transfer exposure system of a reduction ratio of 1/4, is required to have a performance comparable to that required for the corresponding mask exposure system using light, a significantly expensive mask exposure system must be used as the above mask exposure system for making a mask by using electron beams. Further, to attain highly accurately exposure over the entire surface of a mask, various kinds of correction are required to be performed during exposure, resulting in the degraded throughput.
To obtain a high positional accuracy on a mask, a method of making a highly accurate mask has been disclosed, for example, in Japanese Patent Laid-open No. Hei 11-38599, wherein position detecting marks are formed on the entire surface of a mask board, and positional correction is performed by using the position detecting marks at the time of forming a circuit pattern on the mask board by exposure. This method, however, has problems that a throughput is low, and that a pattern forming system excellent in long-dimension accuracy has been not obtained yet at the present time.
Another problem of the electron beam reduction-and-division transfer exposure system is as follows: namely, although any exposure system is designed to transfer a circuit pattern formed on a mask onto a substrate as accurately as possible, there may occur a slight deviation in transfer between one and another of the exposure systems depending on assembling accuracy of each of the exposure systems. An electron beam direct wiring type exposure system such as a variable shaped beam exposure system or a block full exposure system can correct such a deviation at any time by adjusting an electron-optical system while monitoring a condition of the exposure system; however, the transfer exposure system is difficult to correct an electron-optical system at any time because it transfers a circuit pattern on a mask on a substrate at a time.